5152d0c9f7
Foundation for replacing fold's dead/abstract binary encoder with a real
SSA P-Code frontend. Verified root-cause gap: serializeBinaryIR() emits only
data-discovery nodes (sections/strings/imports/exports); the control-flow
BinaryExprKind values (BasicBlock/CallSite/...) are never constructed, so the
Z3-BB encoder's encodable filter is always empty and encodeBinaryBBs never
runs — hence 0 binary Z3 findings. The P-Code pipeline supersedes that path.
Phase 0 — docs/internal/ghidra-pcode-integration-research.md: P-Code opcode
core, the decompiler C++ embedding API (LoadImage/SleighArchitecture/Funcdata),
the CORE+DECCORE+SLEIGH source sets, no-bison finding, and pypcode as build
reference.
Phase 1 — vendored Ghidra decompiler at pinned commit (Ghidra_12.1_build,
7e89d94e34...) under third_party/ghidra-decompiler/ (cpp + AArch64 specs +
Apache-2.0 LICENSE + VENDOR.md + .gitignore for build artifacts). Validated by
hand on this clang-21/macOS toolchain:
- full SSA engine (CORE+DECCORE+SLEIGH, 80 files incl. heritage/funcdata/
action) compiles clean, -std=c++11 -O2, NO BFD, NO bison (generated
parsers are committed upstream; ruleparse isn't in the lib set);
- sleigh compiler builds; AArch64 .slaspec -> .sla compiles;
- tools/pcode_dump.cpp (custom LoadImage, no BFD) lifts the real arm64
sym._div_by_zero_direct to correct P-Code: `mov w9,#0 -> COPY(const 0)`,
`sdiv -> INT_SDIV(w8,w9)` — divisor zero-ness explicit in the data flow,
so the Phase-3 encoder proves div-by-zero trivially, multi-arch.
Not yet meson-wired (next step) and no fold-side IR/encoder yet (Phase 2-3);
this commit is the validated vendor + smoke tool.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
204 lines
6.2 KiB
XML
204 lines
6.2 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<compiler_spec>
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<data_organization>
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<absolute_max_alignment value="0" />
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<machine_alignment value="4" />
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<default_alignment value="1" />
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<default_pointer_alignment value="8" />
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<pointer_size value="4" />
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<wchar_size value="4" />
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<short_size value="2" />
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<integer_size value="4" />
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<long_size value="4" />
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<long_long_size value="8" />
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<float_size value="4" />
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<double_size value="8" />
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<long_double_size value="8" />
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<size_alignment_map>
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<entry size="1" alignment="1" />
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<entry size="2" alignment="2" />
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<entry size="4" alignment="4" />
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<entry size="8" alignment="8" />
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</size_alignment_map>
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</data_organization>
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<global>
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<range space="ram"/>
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</global>
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<aggressivetrim signext="true"/> <!-- Aggressively try to eliminate sign extensions -->
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<stackpointer register="sp" space="ram"/>
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<funcptr align="4"/> <!-- Function pointers are word aligned and leastsig bit may encode otherstuff -->
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<prefersplit style="inhalf">
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<register name="q0"/>
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<register name="q1"/>
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<register name="q2"/>
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<register name="q3"/>
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<register name="q4"/>
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<register name="q5"/>
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<register name="q6"/>
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<register name="q7"/>
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<register name="q8"/>
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<register name="q9"/>
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<register name="q10"/>
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<register name="q11"/>
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<register name="q12"/>
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<register name="q13"/>
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<register name="q14"/>
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<register name="q15"/>
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<register name="q16"/>
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<register name="q17"/>
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<register name="q18"/>
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<register name="q19"/>
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<register name="q20"/>
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<register name="q21"/>
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<register name="q22"/>
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<register name="q23"/>
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<register name="q24"/>
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<register name="q25"/>
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<register name="q26"/>
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<register name="q27"/>
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<register name="q28"/>
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<register name="q29"/>
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<register name="q30"/>
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</prefersplit>
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<default_proto>
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<prototype name="__cdecl" extrapop="0" stackshift="0">
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<input>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d0"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d1"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d2"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d3"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d4"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d5"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d6"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d7"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x0"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x1"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x2"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x3"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x4"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x5"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x6"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x7"/>
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</pentry>
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<pentry minsize="1" maxsize="500" align="4">
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<addr offset="0" space="stack"/>
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</pentry>
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</input>
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<output>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d0"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x0"/>
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</pentry>
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<pentry minsize="9" maxsize="16" extension="zero">
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<addr space="join" piece1="x1" piece2="x0"/>
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</pentry>
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</output>
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<unaffected>
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<register name="x19"/>
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<register name="x20"/>
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<register name="x21"/>
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<register name="x22"/>
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<register name="x23"/>
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<register name="x24"/>
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<register name="x25"/>
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<register name="x26"/>
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<register name="x27"/>
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<register name="x28"/>
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<register name="x29"/>
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<register name="x30"/>
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<register name="sp"/>
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<!-- vectors -->
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<register name="d8"/>
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<register name="d9"/>
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<register name="d10"/>
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<register name="d11"/>
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<register name="d12"/>
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<register name="d13"/>
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<register name="d14"/>
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<register name="d15"/>
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</unaffected>
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<killedbycall>
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<!-- x8: indirect result location register, which is not
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reflected in the pentry list -->
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<register name="x8"/>
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<register name="x9"/>
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<register name="x10"/>
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<register name="x11"/>
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<register name="x12"/>
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<register name="x13"/>
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<register name="x14"/>
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<register name="x15"/>
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<register name="x16"/>
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<register name="x17"/>
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<register name="x18"/>
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<!-- vectors -->
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<register name="d16"/>
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<register name="d17"/>
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<register name="d18"/>
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<register name="d19"/>
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<register name="d20"/>
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<register name="d21"/>
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<register name="d22"/>
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<register name="d23"/>
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<register name="d24"/>
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<register name="d25"/>
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<register name="d26"/>
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<register name="d27"/>
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<register name="d28"/>
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<register name="d29"/>
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<register name="d30"/>
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<register name="d31"/>
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</killedbycall>
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</prototype>
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</default_proto>
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<callfixup name="PlaceHolderCallFixup"> <!-- This is here just to force call fixup and NoReturn fixup. Will be fixed in Ghidra V6.0 -->
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<target name="___NotARealFunctionName___"/>
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<pcode>
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<body><![CDATA[
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tmpptr:4 = 0;
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]]></body>
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</pcode>
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</callfixup>
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</compiler_spec>
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